Tag: AMALIA

Thalia’s AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%

by Syed AhmadPress Release

Thalia, a leader in analog, mixed signal and RF IP design migration, today announced the 24.2 release of its AMALIA platform. The latest update brings advanced features to the AMALIA toolset including estimated parasitics for enhanced design accuracy and a faster migration process for semiconductor IP design engineers.

AMALIA 24.2’s stand-out feature directly tackles one of the most intricate challenges in semiconductor design—accurate parasitic estimation. AMALIA eliminates this traditional constraint and streamlines the design process by intelligently incorporating extracted parasitics from the source design and including them in the circuit porting phase to provide estimated parasitics early in the design process. As a result, the accuracy of the ported schematic is improved, reducing the need for multiple post-layout parasitic extraction (PEX) iterations by at least 30%. This is particularly beneficial in high-frequency applications, and smaller process technology nodes, where precision and speed are paramount.

With this latest enhancement to the AMALIA platform, Thalia once again demonstrates its dedication to reducing design cycle times and associated costs, empowering businesses to achieve faster time-to-market for new product innovations. The new feature streamlines the schematic porting by removing the need for skilled designers to estimate parasitics manually, saving valuable resources and speeding up the design verification process.

Syed Ahmad, VP of Product Development at Thalia, remarked on the update, “With AMALIA 24.2, we’re not just updating a platform; we’re setting a new industry standard for efficiency and precision in IP migration. Estimated parasitics in AMALIA is a testament to our commitment to innovation and the tangible benefits it brings to our customers.”

In addition, AMALIA 24.2 enhances the IP migration experience with a new design centering assistant feature, and updates to its advanced device mapping. The design centering assistant quickly identifies critical devices that impact performance, facilitating precise adjustments, while the device mapping table now benefits from AI/ML-driven auto device recommendations, ensuring optimal device selection and removing the need for manual work.

The launch of AMALIA 24.2 is a pivotal moment for design engineers looking to navigate the complexities of semiconductor design migration with greater ease and accuracy. Thalia remains at the forefront of this endeavor, continuously seeking ways to refine and enhance the IP design migration process to deliver tangible value to businesses trying to maximize their team resources and productivity.

Find out how AMALIA 24.2 can facilitate your IP migration projects, saving both time and budget.

Navigating the challenges of manual IP design migrations

by Awadh PandeyBlog

In semiconductor design, the migration of IP across different technology nodes is a complex but business critical process. This task, traditionally manual, involves a detailed analysis of source and target technologies, migration of schematics and testbenches, and iterative design adjustments to meet specific performance requirements for the final design layout.

The challenges of manual migration

The manual process is intricate and lengthy, taking weeks to months, depending on the complexity of the circuit and IPs involved. Designers must deeply understand circuit behavior across Process, Voltage, and Temperature (PVT) corners, and engage in extensive simulations and iterations to achieve the desired specifications.

Additionally, the rate at which new technology nodes are introduced is accelerating, with each new node introducing more design rule complexity, leading to higher development costs and greater pressure on engineering resources due to the additional time needed to manage the migration process.

A shortage of skilled engineers further complicates the situation, not only extending design timelines and inflating costs due to the premium on expert talent, but also putting companies at risk of falling behind in the fiercely competitive race to secure fab capacity.

Using automation to maximise resources

However, the landscape is evolving, and there is now a range of tools and software solutions on the market designed to tackle these challenges. A key feature to look out for when considering these tools is the use of automation to reduce manual intervention, streamline the migration of designs to new nodes, and optimize designs to save time and cost thus providing a clear advantage over manual processes.

In response to these challenges, Thalia’s AMALIA platform emerges as a prime example, leveraging AI and ML in its suite of tools for advanced analog design, particularly within the PMIC/RFIC domain.

IP reuse diagram
Engagement time saved using AMALIA platform versus manual migration approach.

How AMALIA addresses the gaps in the traditional IP migration flow

The first tool in the platform is AMALIA‘s Technology Analyzer (TA) which automates the initial and time-consuming process of analyzing electrically comparable devices between the source and target Process Design Kits (PDKs) to significantly shorten the time needed for technology assessment and decision-making that would precede any IP migration.

Next, the AMALIA Circuit Porting (CP) tool builds on this analysis, automating the migration of schematics and testbenches with a high level of accuracy and reliability. This step not only maintains the integrity of the original design but also drastically reduces the time required in manual porting.

If circuit porting alone does not meet all the design constraints, AMALIA Design Enabler (DE) uses AI and machine learning to optimize circuit performance, focusing on critical devices and making targeted adjustments. This results in a design that meets, and often surpasses, the required specifications, significantly reducing iterations and the overall development duration.

Lastly, AMALIA‘s Layout Automation (LA) tool ensures that the intelligence gathered during silicon validation is not lost in translation to the final layout. By automating routine tasks and conducting thorough design rule checks, LA maintains the original placement and floorplan, thus upholding the design’s integrity and facilitating a smoother transition to manufacture-ready designs.

A strategic advantage

The semiconductor industry’s shifting towards automated IP design migration is a response to the increasing complexity and pace of technology development. Thalia’s AMALIA platform delivers a comprehensive solution that bridges the gaps in manual design migration flow and offers a unique combination of speed, efficiency, and precision that significantly reduces design cycle time by up to 40%. In turn, associated costs are reduced and time-to-market for new products is faster, offering a strategic advantage to companies looking to stay competitive in a dynamic market.

To integrate an advanced solution like AMALIA into your design workflow and discuss how Thalia can support your needs, please contact us here.

Thalia’s AMALIA qualified on 12nm FinFET technology

by Sou Bennani-McCordPress Release

Thalia has announced the qualification of its AMALIA platform for 12nm FinFET technology, marking a significant step forward in analog, mixed-signal and RF IP design migration. This qualification enables customers to capitalize on the latest in advanced process technology and accelerate time to market for new products without compromising on cost and resource efficiency.  

“FinFET technology delivers substantial performance benefits and enables more efficient scaling in semiconductor devices. This is crucial given the shift towards increasingly smaller technology nodes and transistors,” says Sou Bennani-McCord, Global VP of Sales at Thalia. 

“Leveraging FinFETs, our customers are engineering devices that are not only smaller and more efficient, but also significantly more powerful, all while ensuring compatibility with a variety of technology nodes. This versatility is key for applications spanning from automotive to IoT, AI and ML, and more, positioning our customers at the cutting edge of electronic design innovation.” 

AMALIA offers a smooth and reliable IP migration cycle helping semincondor companies maintain competitiveness by adopting state-of-the-art process technologies, like 12 FinFET. It also enables them to speed up their product development cycles, while staying on budget and remaining efficient operationally. 

By combining an automated IP migration flow with design expertise, the AMALIA software suite simplifies the transition to newer technologies giving customers the flexibility to broaden their product portfolio and extend their market reach in the most efficient way. 

The AMALIA platform has a proven track record, with validation across more than 50 IPs in domains ranging from RF and Baseband to PMIC and PLL/ADC, many of which are already in commercial use. The addition of 12nm FinFET technology into AMALIA’s capabilities reinforces Thalia’s dedication to innovation and its commitment to ensuring its customers remain at the forefront of technology. 

Click here for more information about Thalia and the AMALIA platform.

Process technology analysis: Navigating analog IP migration with precision

by Jean-François LambertBlog

Analog design migration is a key enabler of innovation in the semiconductor market. It’s no longer just an engineering consideration however, it’s a strategic imperative for any company looking to bring new solutions to market and maintain a competitive edge. More recently, this approach has become even more critical as geopolitical factors introduce supply chain uncertainties, making robust and adaptable design migration strategies essential.

With the industry’s push toward smaller nodes for better power, performance, area (PPA), and cost, the need for an effective migration process is crucial to enhance productivity, manage node complexity, satisfy evolving design rules, and maximize the return on original IP designs.

The critical role of process technology analysis

For design engineers considering migrating an existing analog IP to a new node, a clear understanding of process technology analysis is crucial. Device performance, technology characteristics, functional requirements, and design methodology are integral components that engineers must consider. Precision and strategy are critical to successfully navigating the complexities involved.

Traditionally this analysis would be a labor-intensive manual process, often involving scripts and spanning several months. The resulting resource-heavy analyses and prolonged timeframes frequently causing significant delays to critical business decisions. Given the increasing complexity in technology and market demands, this approach is quickly becoming unsustainable.

Streamlining Migration with AMALIA Technology Analyzer

With Thalia’s AMALIA Technology Analyzer (TA) software however, it is possible to move from away from manual, time-consuming processes, to rapid, automated analysis. AMALIA TA automates the evaluation of device electrical characteristics, providing the essential data businesses need to make quick, informed decisions about the most suitable technology nodes and devices for their projects.

AMALIA TA suggests optimal process nodes and devices, speeds up design porting feasibility, and generates detailed reports that drive sound, data-driven decisions and helps businesses mitigate risks. The turnaround time for analysis with AMALIA TA can be as short as 2 to 4 weeks, a significant improvement on the unpredictably long periods typically associated with manual analysis.

The efficiency of AMALIA TA is rooted in its key features which include a user-friendly GUI, quick device test case setup, and thorough device characteristic extraction using industry-standard simulators like Cadence Spectre and Siemens AFS. It provides detailed reports and color-coded tables that clearly outline parameter differences, supporting the decision-making process. It’s also equipped to run rigorous corners and Monte Carlo analysis, culminating in intelligent reporting on device characteristics and a comprehensive device mapping table.

It does this using a streamlined process with clearly defined steps:

  1. Define: Identify the source and target PDKs, devices, and schematics.
  2. Run Wizard: Auto-generate model sets and test cases, with the option for manual adjustments.
  3. Review & Run Analysis: Examine and tailor model sets and test cases to fit precise needs.
  4. Final Output: Receive a detailed report on device electrical characteristics and a device mapping table, empowering engineers with actionable insights.

Tools like AMALIA TA are revolutionizing the analog design migration process, transforming it into a manageable, precise, and time-efficient endeavor. For design engineers worldwide, AMALIA TA not only keeps pace with technological evolution but ensures leadership in innovation and market responsiveness.

Thalia’s AMALIA (23.4a) qualified on Siemens AFS for increased analog design migration flexibility

by Syed AhmadPress Release

Thalia, a leader in analog design migration, today announced the release of AMALIA 23.4a. This latest version of the software suite significantly broadens its capabilities by integrating full support for Siemens AFS Simulator in its Technology Analyzer (TA), Circuit Porting (CP), and Design Enabler (DE) tools.  

“AMALIA was built based around Cadence workflows”, explains Syed Ahmad, VP of Product Development at Thalia. “The added support for Siemens AFS is the first step in a transition to supporting multiple EDA tools to fit all customer design flows and underlines Thalia’s commitment to offering designers unmatched flexibility and efficiency.”  

AMALIA‘s central offer remains the same: dramatically reduce the time, complexity, and costs traditionally associated with migrating and optimizing existing IPs for new technologies and applications. This allows customers to focus simultaneously on both new product development and efficient migration of existing IPs to expand existing product ranges and target new markets and applications. 

Key enhancements in the AMALIA 23.4a release include: 

AMALIA Technology Analyzer (TA): 

  • Integrated device & parameter recognition modules: Modular functionality for more accurate device and parameter recognition. Enhanced auto testcase generation minimizes manual interventions, streamlining the workflow and saving time. 

 AMALIA Circuit Porting (CP): 

  • Simulation comparison: Compare the simulation results of both original and ported designs. Users can determine if the ported design needs further adjustments or if it can be used as it is, ultimately reducing the need for multiple iterations. 
  • Database checker: Before and after the porting process, customers can now examine the database for design completeness and uncover any hidden errors. This step ensures that designers work with a clean database, avoiding unnecessary iterations, thereby saving time and providing a foundation for improved results and error-free porting. 

AMALIA Design Enabler (DE): 

  • Multiple testbenches: Customers can now center several testbenches simultaneously, all using the same design schematic. This facilitates improved optimization leveraging bespoke AI technology.  
  • Regions of Operation: This ensures that the transistor devices operate in the correct region, speeding up the design centering process. 

In addition to these new features, AMALIA 23.4a introduces different licensing levels, offering a flexible approach to cater to individual business requirements.  

While customers can choose to use individual software tools or the entire suite, AMALIA‘s diverse business model now encompasses both licensing and commercial SaaS-based solutions. For those preferring an in-house approach, Thalia can set up and facilitate the use of the AMALIA software directly on the customer’s servers, ensuring IP security within a controlled environment. 

Looking ahead, Thalia has confirmed that the next AMALIA release is scheduled for January 2024. This emphasizes Thalia’s commitment to ongoing improvements in analog and mixed-signal IP reuse and design.

Click here for more information about Thalia and the AMALIA platform.