Thalia Design Automation successfully delivers voltage regulator in a 22nm process node with 45% reduction in design time using its AMALIA software

Thalia Design Automation, a leading IP reuse company, produced a temperature invariant reference voltage to replace a bandgap within an LDO migrated to a 22nm process node, using its AMALIA software with a 45% reduction in design time for the client.

Thalia was approached by a client which needed to re-use a virtual component LDO for SoC integration.

Thalia CTO Sowmyan Rajagopalan said: “During an LDO migration to a 22nm process node, our client urgently needed to find a temperature invariant (ZTC) solution. This is typically a difficult and time-consuming process.

“However, using our unique methodology and advanced AI algorithms, we confirmed a solution in close to half the usual design time, enabling our customer to meet tough delivery deadlines.”

An ultra-low quiescent current programmable regulator is used to generate SoC internal supply for retention logic islets. It is suitable for ultra-low power loads for ultra-low leakage mobile applications, RFID active tags, medical applications, battery-powered devices, and so on.

The requirement for the internal reference was to achieve ZTC with <0.5% variation over any process corner and no more than 6% across all corners. The LDO had its own internal non-Bandgap voltage reference, which needed re-tuning for ZTC.

This is typically a very labour-intensive process over PVT corners, requiring up to a week of valuable design resources.

The Thalia team migrated the existing regulator from the original 22nm technology to the target technology, using the AMALIA platform’s schematic porting capability – this avoided the significant delays associated with employing manual techniques.

Thalia designers analysed the voltage regulator and identified the key components that required adjustment via the AMALIA Design Enabler. They also set up the rules through which the Design Enabler would operate. This enables AMALIA to efficiently and intelligently identify a circuit that meets the ZTC criteria, while minimising area.

The full case study for this project can be found at