Month: July 2025

Artificial Intelligence has become a ubiquitous label across industries—and electronic design automation is no exception. At Thalia Design Automation, we have to admit that we’ve contributed to the trend. We’ve described our AMALIA Platform as “AI-powered,” and while that’s technically accurate, we recognise that such claims are often unhelpfully vague—ours included.

Like many in the EDA space, we’ve used the language of AI without always explaining what specific problems we’re applying it to, how it works under the hood, or why it can be trusted in the context of analog IC design. For engineers used to rigorous, deterministic workflows, this kind of fuzziness is frustrating—and rightly so.

This article aims to correct that. We take a detailed look at where and how AMALIA applies machine learning and optimisation techniques, what kinds of problems they’re intended to solve, and why the methods we’ve chosen make sense for analog design migration. It’s a candid account of what’s under the hood—no hype, just the logic and reasoning that engineers expect.

Why Analog Design Migration Is a Hard Problem

Migration of analog circuits between technologies involves more than redrawing layouts or updating device libraries. It requires preserving performance across process variations, layout-dependent effects, and foundry-specific modelling differences.

Key challenges include:

• Identifying equivalent devices between technologies when characteristics and naming conventions differ
• Retaining circuit performance and behaviour, particularly at PVT corners
• Adapting layouts without breaking electrical or physical constraints
• Maintaining signal integrity and parasitic performance

These are not routine tasks that can be fully scripted. They require context-aware decision-making—some of which can be supported by AI and algorithmic reasoning.

1. PDK Interpretation: Structured Learning for Device Recognition

A recurring problem in analog migration is inconsistent naming in foundry PDKs. The same device may be labelled very differently across processes.

• AMALIA’s Device Recognition algorithm addresses this using a refined variant of the Q-gram method. It applies substring analysis, probability models, and rule sets to infer device types from names and context.
• This falls under structured learning—labels (device types) are known, but the feature space is unstructured and highly variable.

Standard name-matching approaches (e.g., phonetic encoding) don’t work here, due to lack of similarity across foundries. The implemented method is tailored for EDA data structures and analog domain requirements.

2. Device Mapping: Structured Learning for Technology Matching

The Technology Analyzer module performs device-level mapping between source and target technologies. This is a core step in analog migration, where the aim is not just to match by name or type but by behaviour and suitability in context.

• The Device Mapping algorithm uses a structured learning approach. Training data consists of source-target device pairs considered optimal by expert evaluation. A model is then trained to reproduce these decisions based on device’s electrical characteristics.
• Additional refinements allow the mapping process to take into account user preferences (e.g., prioritise leakage vs. noise) and additional measured characteristics.

The weighting models are expert-tuned but may evolve toward statistical methods like logistic regression if sufficient training data becomes available. This step remains explainable and traceable—a priority for engineers concerned with visibility into automated decisions.

3. Key Device Identification: Focused Circuit Porting

In the Circuit Porting stage, the challenge is to identify which transistors have the largest influence on circuit performance—so that migration effort is focused where it matters.

• The Key Devices algorithm uses parameter analysis and robust calculations to identify sensitivity hotspots. This is a form of unsupervised analysis, although the logic is rule-based and deterministic in practice.
• Matching and ranking of Key Devices algorithm uses constraints driven modelling rule sets rather than probabilistic models which avoids introducing uncertainty where direct analysis is possible.

This approach is deliberately conservative. Planned future work includes exploring reinforcement learning methods to support automated design centring through guided iteration, though only where the cost of simulation is justified.

4. Layout Automation: Optimisation Over ML

Layout migration is handled through deterministic, mathematically defined algorithms rather than machine learning. This is intentional.

• The Metal Stacking algorithm identifies possible variants based on available space before updating the via array. 
• The Stretching algorithm adapts layout geometry based on device scaling, formulated as an optimisation problem solvable by Gaussian elimination. It preserves symmetry and routing paths while minimising unnecessary layout disturbance.
• The Routing algorithm connects layout elements using a modified version of Dijkstra’s shortest path algorithm, including penalties for excess turns to improve analog performance. This is a graph-based optimisation problem, not an ML task.

These steps are engineered for precision and reproducibility. Using ML here was considered and rejected in favour of approaches that provide predictable results under constraint.

5. Design Optimisation: Hybrid Search and Learning

Once migration is complete, migrated designs must be retuned or “centred” to meet performance specifications across corners.

AMALIA includes several algorithmic approaches here:

• Evolutionary algorithms simulate trial-and-error design evolution. These are guided by reinforcement learning principles: good results receive rewards, poor ones are penalised.
• The algorithms are adapted for analog use cases through:
  • Trend Following (unsupervised discovery of parametric relationships)
  • Genetic Engineering (parameter mixing based on performance alignment)
  • Dynamic Weighting (emphasis on failing specs)
• A local Interpolation algorithm (a form of supervised learning) models the design space near promising solutions. A gradient-following method is then used with this model to fine-tune performance.
• These two approaches are combined using a proximity penalty function to ensure the global search doesn’t stall in local optima. This avoids overfitting to one solution while improving convergence speed.

This hybrid model allows AMALIA to explore broader regions of the design space and achieve usable results in fewer iterations.

Where AI Helps – and Where It Doesn’t

Across AMALIA, AI techniques are selected based on suitability, not fashion. In summary:

• ML is applied where the problem domain involves ambiguity, large input spaces, or multi-dimensional correlation (e.g., device matching, design optimisation).
• Deterministic methods are used where constraints are strict and repeatability is critical (e.g., layout geometry, routing).
• Explanations are always available: no black boxes, no guesswork.

Final Thoughts

Analog design engineers have good reason to be cautious about AI claims in EDA. The discipline demands precision, transparency, and rigour. The AMALIA Platform was built with those expectations in mind.

AI is used in AMALIA – but selectively, and in combination with more traditional methods. Every technique is grounded in domain-specific challenges, tested against engineering expectations, and intended to complement—not replace—expert input.

As analog migration becomes a more frequent requirement in design reuse and technology adaptation, engineers will need tools that offer both automation and control. We believe AMALIA is a step in that direction.

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