Author: thaliadaeditor

Thalia joins GlobalFoundries’ GlobalSolutions Ecosystem to advance IP reuse and design migration

by thaliadaeditorPress Release

Cwmbran, United Kingdom – 17th April 2025 – Thalia, a leading provider of analog, mixed-signal, and RF IP design migration solutions, is pleased to announce its partnership with GlobalFoundries (Nasdaq: GFS) (GF), a global leader in semiconductor manufacturing.  As a member of GF’s GlobalSolutions™ Ecosystem, Thalia brings its cutting-edge AMALIA Platform to a broader audience of GF customers, empowering them to tackle the challenges of design migration across a diverse range of technology nodes.

The AMALIA Platform harnesses advanced automation and AI/ML technology to streamline the migration process for analog, mixed-signal, and RF IPs.  With this innovative platform, GF customers can reduce the time, cost, and complexity associated with migration while optimizing their ability to create groundbreaking applications and expand their offerings in today’s fiercely competitive semiconductor market.

“Joining forces with GlobalFoundries marks an exciting milestone for Thalia,” said Sowmyan Rajagopalan, CEO, Thalia.  “This collaboration allows us to deliver unparalleled value to our shared customers, simplifying the complexities of analog design migration and IP reuse.  By providing the tools needed to diversify product offerings and adapt to global supply chain dynamics, we are helping customers stay ahead in an ever-evolving industry.”

Ziv Hammer, Senior Vice President of Design Platforms and Services at GlobalFoundries, commented: “Thalia’s proven expertise in analog and mixed-signal design, combined with GF’s advanced technologies, enables our customers to drive innovation more efficiently.  By leveraging AI/ML capabilities, they can accelerate their product development cycles and bring cutting-edge solutions to market faster.”

GF’s GlobalSolutions™ Ecosystem represents a collaborative network of leading design, IP, and OSAT providers that work closely with GF to deliver end-to-end semiconductor solutions.  By building on these strategic partnerships and GF’s industry-leading process technologies, the GlobalSolutions Ecosystem ensures tailored, high-performance solutions for customers across a wide range of critical industries.

About GlobalFoundries
GlobalFoundries (GF) is a leading manufacturer of essential semiconductors the world relies on to live, work and connect.  We innovate and partner with customers to deliver more power-efficient, high-performance products for the automotive, smart mobile devices, internet of things, communications infrastructure and other high-growth markets. With our global manufacturing footprint spanning the U.S., Europe, and Asia, GF is a trusted and reliable source for customers around the world.  Every day, our talented global team delivers results with an unyielding focus on security, longevity, and sustainability. For more information, visit gf.com

EETimes : EDA tool preserves floorplan, intelligence in analog IP design migration

by thaliadaeditorNewsNews & Events

On the announcement of the new version of AMALIA, Nitin Dahad, editor-in-chief of EE Times, meets Sowmyan Rajagopalan for an advance briefing and video interview.

Visit EETimes web pages for the full article https://www.eetimes.com/eda-tool-preserves-floorplan-intelligence-in-analog-ip-design-migration/

Summary

In a recent interview, Sowmyan Rajagopalan, founder and CEO of Thalia Design Automation, discussed exciting new features introduced in the latest version of their IP reuse platform, Amalia. Among these advancements are notable offerings such as the Layout Automation Suite, aimed primarily at streamlining chip reuse, and the automated migration of analog integrated circuits. Rajagopalan highlighted that these developments could reduce layout migration times by 30-40%, ultimately modernising processes that traditionally lacked automation, especially in the analog and mixed-signal design sectors.

The discussion also delved into the historical evolution of Amalia, starting from its inception in 2011 to its significant advancements since venture funding in 2014. Thalia’s specialised focus on analog and mixed-signal design allows their platform to provide a unique automated flow for designing and migrating between semiconductor technologies. Rajagopalan emphasised the importance of retaining existing topological intelligence during the migration process to minimise risks associated with redesign. With an aim to position Amalia as the benchmark in its field, Rajagopalan outlined his vision for the company, focusing on customer engagement, expanding market opportunities, and enhancing the overall user experience in chip design.

Key topics & insights

🛠️   Necessity of automation in analog design

⚙️   Integration of Machine Learning

🏢   Strong client base and strategic partnerships

🏁   Feedback-driven development

🔍   Preserving topological intelligence

📊   Industry impact

💡   Visionary roadmap

Thalia Announces Latest Version of AMALIA with Game-Changing ‘Device-Stretching’ Algorithm and Flip Well Intelligence

by thaliadaeditorPress Release

Cwmbran, United Kingdom – 11/02/2025 – Thalia Design Automation is thrilled to announce the immediate availability of the latest version of the AMALIA Suite, their AI-powered industry end-to-end IP reuse platform. 

This release brings significant enhancements throughout AMALIA, particularly within its Layout Automation Suite.  The solution retains the intrinsic value of production silicon, delivering the final step in the design migration flow.  It employs a custom AI Design Transformer engine for analog physical implementation, leveraging the source layout and PDK.  The migrated layout maintains the existing floorplan, ensuring DRC/LVS integrity.  With AMALIA, customers can have a dedicated solution to the challenge of analog and mixed-signal migration and reliably achieve migration design time savings of up to 40%. 

“Our mantra is to continually drive down migration design cycle time and we achieve this with dramatic steps at each major release of AMALIA,” said Thalia’s CEO, Sowmyan Rajagopalan.  “We’ve introduced a game-changer within the Layout Automation Suite with a new device-stretching algorithm, metal stacking, along with significant functionality enhancements to automate the identification and migration to Flip Well designs for FDSOI.”

IP layout migration from one silicon process to another often encounters challenges due to varying PCell sizes. This results in open and shorts when trying to maintain the floor plan between the source and target technology. Fixing this manually can be a very time consuming. AMALIA’s new ‘device-stretching’ algorithm solves this issue while preserving the floorplan, delivering DRC-clean results, and promising substantial time savings.

For designs migrating to or from FDSOI, new analysis capabilities in AMALIA’s Technology Analyzer solution can identify standard transistor versus Flip Well devices and their unique electrical connection requirements, This knowledge seamlessly carries through to the Circuit Porting phase of migration, where AMALIA efficiently guides the user with their relevant design options.

These new capabilities – the device stretching algorithm, metal stacking and the analysis for Flip Well devices – represent significant advances in AMALIA.Thalia’s customers have experienced design cycle time reductions of up to 40%, thanks to continuous advances in the tool suite.  This latest product release reinforces AMALIA’s unique position in analog design and IP migration.

For more information, visit thalia-da.com or contact us here.

Summary of capabilities added to AMALIA products in release 24.4

  • Layout Automation Suite
    • New device-stretching algorithm
    • Smart vias porting to achieve DRC-clean vias
    • Improved device mapping generator
    • Devices shifting based on layer combination
  • Design Enabler
    • Enhancements  to rapidly identify devices that impact circuit performance
  • Circuit Porting Suite
    • Flip well identification and related unique connections
    • Conditional device mapping and improved generator
    • Circuit area calculation
  • Technology Analyzer
    • Preference driven device mapping
    • Flip Well design recognition in FDSOI process technology
    • AI device recognition and analysis
    • Enhanced waveform interpolation algorithm
Figure 2 Layout Automation Suite GUI and AMALIA integration within Cadence Virtuoso