Thalia Design Automation successfully delivers voltage regulator in a 22nm process node with 45% reduction in design time using its AMALIA software

Thalia Design Automation, a leading IP reuse company, produced a temperature invariant reference voltage to replace a bandgap within an LDO migrated to a 22nm process node, using its AMALIA software with a 45% reduction in design time for the client.

Thalia was approached by a client which needed to re-use a virtual component LDO for SoC integration.

Thalia CTO Sowmyan Rajagopalan said: “During an LDO migration to a 22nm process node, our client urgently needed to find a temperature invariant (ZTC) solution. This is typically a difficult and time-consuming process.

“However, using our unique methodology and advanced AI algorithms, we confirmed a solution in close to half the usual design time, enabling our customer to meet tough delivery deadlines.”

An ultra-low quiescent current programmable regulator is used to generate SoC internal supply for retention logic islets. It is suitable for ultra-low power loads for ultra-low leakage mobile applications, RFID active tags, medical applications, battery-powered devices, and so on.

The requirement for the internal reference was to achieve ZTC with <0.5% variation over any process corner and no more than 6% across all corners. The LDO had its own internal non-Bandgap voltage reference, which needed re-tuning for ZTC.

This is typically a very labour-intensive process over PVT corners, requiring up to a week of valuable design resources.

The Thalia team migrated the existing regulator from the original 22nm technology to the target technology, using the AMALIA platform’s schematic porting capability – this avoided the significant delays associated with employing manual techniques.

Thalia designers analysed the voltage regulator and identified the key components that required adjustment via the AMALIA Design Enabler. They also set up the rules through which the Design Enabler would operate. This enables AMALIA to efficiently and intelligently identify a circuit that meets the ZTC criteria, while minimising area.

The full case study for this project can be found at www.thalia-da.com/resources

Long tail supply chain ramifications

supplychainAs the world recovers from the global pandemic and vaccination programmes gain pace, the tone of news is, on the whole, optimistic. As the focus moves to economic recovery and a return to something resembling normality, many sectors are breathing a metaphorical sigh of relief.

Elsewhere are worrying signs that the knock-on effects of the pandemic are only now beginning to surface. Factories that shut down and are now ramping back up to capacity are finding they are coming back online only to face supply chain issues as capacity in component supplier factories has shifted to other priorities.

The automotive sector is one of many affected. Modern cars have an abundance of technology – recent reports suggest 150 million lines of code and up to 100 different processors. As the pandemic hit, automotive manufacturing slowed as demand stalled, and only now that other sectors are opening up are demand forecasts suggesting that the time to ramp up production has arrived. But the supply chains that are relied upon for the sensors, circuits and processors have been diverted to service sectors that didn’t stall, and in fact thrived, through the pandemic.

Sectors including wireless, IoT, personal comms and video streaming have burgeoned through the pandemic. Zoom’s revenues had quadrupled by September 2020, and Microsoft reported a 50% increase in daily active users and neither are expecting this increase in demand to drop off. So when automotive demand dropped, fabs switched their attention – and capacity – to service sectors that were thriving. It’s good business.

But those same fabs aren’t going to switch back at the drop of a hat when the car industry calls – contracts are signed, processes in flow and capacity simply isn’t there. Fabs slowed down the expansion of their wafer capacities as demand was lower. It takes time – from 20 weeks up to a year or two to bring a wafer fab online, so simply increasing capacity isn’t an option either. Instead, the fabs are in a position of strength, with their services in high demand, so the long-term picture, for them at least, is strong, but for sectors that experienced a drop in demand and revenues and were anticipating a resurgence, it seems the true impact of the pandemic is only now starting to take effect.

It’s rumoured that TSMC’s 5nm capacity is all taken up by Apple, and Samsung are in a similar thriving position, with reports that their legal teams are all engaged in managing NDAs and contract negotiations and have no capacity to discuss new engagements with prospects.

So while some win, others lose out. In the long run, things will inevitably find some type of equilibrium, but in the short term is there a learning to be taken? Could IP reuse shortcut at least some of the delay?

Perhaps. But supply chain resilience is a huge and escalating issue. There are other socio-economic issues in the mix too with tensions around political topics in the far east, anxieties are certainly high. There has never been a more important time to ensure your supply chain is robust, resilient and reliable.

This is an issue occupying many in Europe and the US. With the issue now top-of-the pile for leading politicians globally – not least in the White House – one positive outcome is likely to be the development of new manufacturing plants closer to home.

Interesting to note that since I posted this blog the subject has gone mainstream – for example, in a recent news piece from the BBC, the Harvard Business Review and the Guardian.

 

Thalia successfully completes 20th 22nm analog IP reuse engagement

Successful completion of 20 analog design IP migration into 22nm technology node demonstrates a robust platform for efficient and cost-effective porting

Cwmbran, UK, 4 March 2021. Thalia Design Automation, a leading IP reuse company and experts in targeted automation for analog and mixed signal design and migration, today announced the successful completion of its 20th analog IP portfolio migration into the 22nm technology node.

This milestone demonstrates the potency of Thalia’s AMALIA platform – particularly in migrating analog IP to 22nm.  Using the AMALIA IP reuse platform, Thalia is able to reduce the number of iterations required to reuse an IP in a new technology or node. The data generated by the platform informs how similar or dissimilar the base and target technologies are, allowing Thalia to plan and drive the IP reuse process more efficiently. The result is that the process delivers solutions 30-50% more quickly than conventional approaches.

The 22nm node fits perfectly with analog and mixed-signal applications mainly for audio and power management analog IPs. Migrating to 22nm delivers significantly lower leakage and boosts performance and Thalia enables its clients to benefit from this, swiftly and efficiently migrating analog IP to the 22nm process. In doing so, they help them to leverage the power and performance benefits of the node and expand their IP portfolios cost effectively.

“This milestone is a testament to our unique approach to IP migration,” said Sowmyan Rajagopalan, Thalia Design Automation CTO. “Many companies can offer design expertise in migrating analog IPs, but our unique combination of experienced designers, targeted automation through the AMALIA platform, and advanced methodologies means migrations can be successfully completed in less time, saving our customers time and money. By reducing the cost to reuse IPs, the barrier that impacts the decision to move IPs from one technology / node to another is reduced. With an efficient IP reuse solution, more companies would be able to address the full spectrum of market opportunities; that’s what Thalia delivers.”

Thalia has applied its unique combination of experienced analog design resources and innovative automation methodology to products using a wide range of technologies and process nodes. Thalia has a proven track record of delivering designs in cutting edge applications and in advanced technologies, and in some of the industry’s most demanding application areas. Thalia’s solutions are available as a service.

Fabs, foundries and fame

While our USP is in circuit and IP reuse, our ongoing engagement in technology transitions is almost as important. We’re working with all of the major names in the semiconductor industry to enable a cost-effective and high-quality transfer process.

There are a number of transition scenarios. For fabless companies and design houses, Thalia assists the development teams, helping them in the reuse of analog and mixed signal circuits and IPs with the AMALIA platform. The source and target foundry can be selected by the customer and qualified using Thalia’s Technology Analyzer, but Thalia also has the ability and expertise to advise on both node and foundry selection. Next, our experienced design team and proprietary Design Enabler is used to center the target design in the fastest and most efficient way.

On the other hand, for companies who prefer to use their own fabs and internal design teams, we offer our circuit and IP reuse platform adapted to their specific EDA environment (Cadence, Silvaco, Siemens EDA, Synopsys).

Quite often, IC design groups don’t have the in-house capabilities of a specialist company like Thalia to effectively adapt their EDA tools and tune their framework to specialised needs.

Selection of logos of fab companies

Figure 1: Targeted semiconductor fabs and foundries

In recent years our circuit and IP reuse platform has grown in popularity, largely because of the demonstrable benefits it delivers. These include:

  • an efficient upfront qualification of the target process technology
  • reduced design and redesign cycle time
  • the swift generation of a portfolio of IPs.

We can also deliver improved performance, power and area of reused circuits and IPs.

Importantly too, we adapt the design reuse process to our customers’ needs. Thalia can take the full ownership of all aspects of migration or reuse including schematic architecture and layout and any re-centring or revisions that are needed.

Our business is to transition designs and our experienced designers, advanced methodologies and our automated AI based platform mean we are much more efficient and effective in this than many design houses. If we save up to 50 percent of the time that might otherwise be taken up in such a redesign, money is not only saved on worktime, redesign and people, but also on tools. The potential savings for our customers is in the order of tens of thousands of dollars – and we’re enjoying a lot of success.

Diagram showing time saving possibilities

Figure 2: Examples of time savings delivered using AMALIA platform

Completing engagements faster and at less cost brings two significant additional benefits to our clients:

  • Completing migrations faster means they are the first to market, gaining a competitive edge that is hard to overcome, and
  • With lower development costs, return on investment is achieved much sooner. If costs are halved (for example) then the number of licenses of a given product that need to be sold to recoup development costs are vastly reduced.

A growing fame in a growing market and working with the worldwide foundry leader for many years, delivering fantastic results time and time again, we’re justifiably proud of what we are achieving.

Isn’t it time you found out what we could do for you?

IPSoC 20 Conference: Increasing confidence in analog and mixed signal design reuse

At the December virtual IPSoC conference, our CTO, Sowmyan Rajagopalan, presented his paper on increasing confidence in analog IP reuse. His presentation is available in the video below. If you would like to understand what Thalia’s targeted automation and migration expertise means for your next project, get in touch to find out more.

How open is OpenRAN?

Why is OpenRAN important and what is its likely impact on the silicon market?

While these are questions I often hear, it’s difficult to give a precise answer as there is still an amount of uncertainty over the details of OpenRAN and depending how the evolution progresses, the response will be tailored accordingly.

A truly open OpenRAN would indeed have extraordinary promise. However, a vendor-neutral hardware and software-defined technology based on open interfaces and community-developed standards is not a given. Certainly, openness on the hardware side of the equation is far from guaranteed.

That would not necessarily be an end to the matter. If software – and the interface software in particular – became totally open, that really would be a game-changer. Generic software would bring down costs significantly. The business model for 5G would be transformed, and 5G IoT in particular would undoubtedly benefit.

Think of the average household. How many devices were networked five or six years ago? Four or five perhaps? By contrast, today a home with 25 or more objects wirelessly linked or enabled – cameras, radios, virtual assistants, hi-fis, tablets, laptops – wouldn’t be a surprise.

Many of these rely on Wi-Fi. But a genuinely low-cost 5G enabled by truly open RAN protocols could become a credible alternative – and not only in the home. 5G support for IoT, made more cost-effective via OpenRAN – could turn some fairly fanciful scenarios into reasonable business models. It could mean, for example, that turning your own car into a hub would be a good investment.

And ubiquitous 5G – again enabled by non-proprietary software – could have a transforming effect on phone manufacture – and cost.

But will OpenRAN really be open? We won’t know for sure when the first iteration of 5G rolls out; it’s too early for OpenRAN to influence it. Much of the protocol and standards work is still being done.

But when 5G 2.0 appears, the usefulness of a truly open RAN will be clear – if that is actually what OpenRAN delivers. Hardware supply is still dominated by a few major names, and it’s hard to see that changing. There is, however, more optimism on the software front. We shall see.

As for semiconductors, new protocols and enhanced compute powers would be part of a number of changes that would almost certainly make many new – and appealing – demands on the semiconductor space – or they could, if OpenRAN’s promoters really mean what they say.

In reality, the concept of OpenRAN will be an evolving process and as things become more clear in subsequent iterations / generations of the protocol, it will become clear which players are active on specific architectures and what type of truly open access can be brought about in this space.

Hands-free driving – and the technology behind it

Hands-free driving could be legal on UK roads by spring next year, the UK government has said. A consultation on the technology involved is under way. Specifically the UK’s Department for Transport (DfT) has issued a call for evidence into automated lane keeping systems (ALKS).

The technology to do this is still very much developing, although we can certainly expect that it will make significant demands on the semiconductor industry that Thalia serves. But first some background.

This consultation looks at level three (of five) on the way to the ultimate aim of completely automated driving. In stage two the vehicle can control both steering and acceleration / deceleration. The automation isn’t classed as self-driving because a human is still required to sit in the driver’s seat and be prepared to take control of the car at any time.

Level 3 vehicles, however, have what are called environmental detection capabilities and can make informed decisions for themselves, such as accelerating past a slow-moving vehicle. The driver must remain alert and ready to take control if the system is unable to execute the task but, in theory, the driver could do other things such as check email or even watch a movie – until the car prompts him or her to take over again.

But don’t get too excited just yet. The UK government’s call for evidence, at some 46 pages, makes some pretty stern safety demands of what it calls ‘a traffic jam chauffeur technology designed to control the lateral and longitudinal movement of the vehicle for an extended period without further driver command’. These demands include a driver availability recognition system, reasonable thresholds designed to prevent unintentional inputs into the override capabilities, a data storage system for automated driving and numerous compliance requirements involving monitoring and control criteria – to name but a few.

But that isn’t all. The ALKS regulation approved in June 2020 by the United Nations Economic Commission is for a system (in its current form) capable of operating at speeds of up to just 37mph. It is therefore designed for situations of heavy, slow-moving traffic on a motorway. Why motorways? Because they go one way and are more controlled and simpler environments than most others. A slow-moving motorway is a good place to try out stage three ALKS.

Elsewhere in Europe, Germany has drafted legislation for level 4 autonomous vehicles. As yet, the legislation remains unpublished, but Germany, as the country of origin for most OEMs relating to the technology behind assisted and self-driving vehicles, could expect to see the reality of self-driving vehicles sooner rather than later. If this is the case, German legislation will likely guide all other nations legislative developments.

Even with the restrictions at levels 3 and 4 of automation, the market seems to be a promising one. According to a report released earlier this year by Acumen Research and Consulting, the global automotive lane keep assist system market is expected to reach a market value of around US$7 billion by 2026 and is anticipated to grow at a CAGR of around 16% in terms of revenue during the report’s forecast period 2019 to 2026.

It will no doubt mean a lot of work supplying a whole new market with tech – and a whole new semiconductor market with relevant IPs. And, of course, this market has a lot of development to do; new requirements, new sensors, new software and new hardware will supersede each other. Within a lot less than ten years, we may see not only level four (vehicles operating in self-driving mode within a limited area) but early level 5 cars: able to go anywhere and do anything that an experienced human driver can do.

As for public acceptance of ALKS, we can certainly assume that even hiccoughs or bad publicity will only slow rather than stop the rollout of this form of automated driving, and that when the first completely autonomous cars arrive – sometime after 2026 in all likelihood – a $7 billion market will just be the start.

Thalia and Dolphin Design announce partnership

Transforming analog IP re-use economics and accelerating time to market

Advanced IP re-use plus technologies employ advanced AI algorithms and targeted automation with smart design methodology to improve outcomes and to reduce the resource costs of analog IP portfolio development

Cwmbran, UK, Grenoble, France 4th September 2020. Thalia Design Automation, experts in targeted automation for analog and mixed signal design and IP reuse, and Dolphin Design, a leading company in semiconductor IPs and  platform solutions, today announced a partnership transforming the way IP portfolios are expanded and managed, delivering new IPs to market faster and more cost-effectively than through conventional processes.

The partnership has already seen Thalia’s targeted automation platform, AMALIA, deployed alongside its experienced analog design and migration experts, to deliver power management and audio IPs supporting respectively Dolphin Design’s SPIDER and BAT platforms during the last 12 months. Thalia’s unique trifecta of design expertise, its proprietary technology analyzer and targeted automation enable project delivery up to twice as fast as a conventional design process.

The initial phase of the partnership has delivered 12 power management and audio IPs in various process nodes and flavours that enabled Dolphin Design to improve market penetration by expanding its portfolio of analog IPs using Thalia’s technology and expertise.

Philippe Berger, Dolphin Design CEO, said: “Conscious of the explosive growth in IoT, mobile and automotive, we decided to focus our in-house design teams one hundred percent on delivering innovative new IP designs for customers. Thalia’s AMALIA platform and its experts frees up our engineering resources to design future IP generations and helps us grow into new markets through a wider panel of technological nodes, as well as to consolidate our position. The partnership with Thalia allows us to expand our IP portfolio and to achieve a faster Time-to-Market, while improving our innovation capabilities.”

Sowmyan Rajagopalan, Thalia Design Automation CTO, said: “To date, our partnership with Dolphin has been hugely productive and we are excited to move on to the next phase.  Our AMALIA platform takes IP re-use to the next level – what we are calling IP re-use plus – allowing clients like Dolphin Design to benefit from cost-effective technology analysis, coupled with design and targeted automation tools that enable us to deliver specified features and performance with precision and against challenging time-to-market and cost requirements.”

About Dolphin Design 

Headquartered in France, Dolphin Design, previously known as Dolphin Integration, is a semiconductor company employing 160 people, including 140 highly qualified engineers.

They provide differentiating platform solutions built on state-of-the-art IPs and architectures, customized by unique system level utilities to deliver fast and secure ASICs, either designed by or for their clients. These platforms are available for various technological processes and optimized for Energy Efficient SoC Design.

Alongside their clients, now exceeding 500 companies, they focus on human, inventive and long-term collaboration to enable them to bring products, powered by innovative and accessible integrated circuits that minimize environmental impact, to the hands of billions of people every day. In consumer markets including IoT, AI and 5G, and in high reliability markets, they unleash SoC designer creativity to deliver differentiation.

Tell them your biggest dream. Dare the impossible. They tech it on.

Press contact: aurelie.descombes@dolphin.fr

SemIsrael: Thalia CTO Sowmyan Rajagopalan discusses the challenges of analog IP reuse  

Looking back on June’s SemIsrael virtual event and reflecting on the topics discussed, it’s clear that the developments taking place in the fields of LIDAR and 5G are having a significant impact on the semiconductor industry.

The need for high speed sensors and data conversion to enable autonomous cars will place an increasing demand on the sector to deliver components quickly and evolve them as technology advances. While full autonomy is some way off, the evolutionary process of connected vehicles will mean that the needs will change as technology becomes more advanced and vehicle systems demand more from sensors and mobile data connectivity.

Machine learning was also prevalent in the agenda and discussions. The benefit of machine learning in migration from one process to another is clear and given the time that can be saved in getting new IPs to market, it’s no surprise that the industry is heading in this direction.

Verification, design, IoT devices and Thalia’s own targeted automation technologies are all areas where we are seeing machine learning play an ever-more important role. High performance circuits, including technologies such as 12FF and 7FF, are increasingly demanding the efficiency and accuracy that machine learning can deliver at pace.

Our CTO, Sowmyan Rajagopalan, presented his paper on addressing technology differences in IP reuse. His presentation is available in the video below. If you would like to understand what Thalia’s targeted automation and migration expertise means for your next project, get in touch to find out more.

Layout automation: achievable or illusory?

We are extremely successful efficiently migrating, refining and optimizing existing IP for new technologies and applications. Specifically, we are able to reduce the number of iterations it takes to get from our starting point – analysis of the process technology – all the way to layout migration.

However, layout migration is one step that remains very challenging and it’s worth taking a little time explaining why it remains resistant to automation.

Firstly, layout migration is never uniform: it’s almost by definition a custom design process, in fact. If you move from, say, one semiconductor platform to another or from 40 nanometre to 28 nanometre, it’s not just the names and numbers that change – the chip’s characteristics also change.

The layout needs to factor in those aspects: the way the devices are placed, the metals, the routing, how the chip is configured. But that’s not all. The way you position or place the structures on the layout is also going to have an impact on circuit characteristics. So too is the size of nodes.

Essentially then, the size of the chip is dependent on how you put together the layout – and the factors you are dealing with are not uniform.

Design simulation is also affected. Schematic-level simulations and layout simulations were once comparable. Now they are diverging – mainly because there are various elements that schematic-level models cannot factor in.

Capacitance is another issue. There are fancy equations to explain this but, put very simply, it’s about ever smaller conductor-to-conductor spacing and the knock-on effect of parasitic capacitance, which impacts the frequency ranges and the circuit characteristics. Parasitics in these ever-smaller dimensions have become a big issue.

All of which explains why full-on layout automation is so challenging: it needs to address all the problems layout design can throw up. The reality is it can’t.

But that’s no reason to abandon automation entirely. Our IP re-use platform tool – AMALIA – does not generate a complete layout factoring in all circuit characteristics, device sizes and parasitics. For the moment, that is impossible.

However, generating a base framework that compares with the base design in aspect ratio, device placement and routing of main signal nodes will assist the layout designer with a good starting point. About 20-25 per cent of the layout work should be speeded up when we reach this point. This should happen in the next 12 months.

The goal is to have something that builds a basic framework of the layout. And if you can offer that you will reduce the amount of time a layout designer would have to spend then putting together the layout.

Thus our aim is targeted automation – and that is achievable. What isn’t achievable – and may never be – is an all-singing, all-dancing layout automation tool. If someone offers you that, be very, very wary.