Tag: IP reuse

Navigating the challenges of manual IP design migrations

by Awadh PandeyBlog

In semiconductor design, the migration of IP across different technology nodes is a complex but business critical process. This task, traditionally manual, involves a detailed analysis of source and target technologies, migration of schematics and testbenches, and iterative design adjustments to meet specific performance requirements for the final design layout.

The challenges of manual migration

The manual process is intricate and lengthy, taking weeks to months, depending on the complexity of the circuit and IPs involved. Designers must deeply understand circuit behavior across Process, Voltage, and Temperature (PVT) corners, and engage in extensive simulations and iterations to achieve the desired specifications.

Additionally, the rate at which new technology nodes are introduced is accelerating, with each new node introducing more design rule complexity, leading to higher development costs and greater pressure on engineering resources due to the additional time needed to manage the migration process.

A shortage of skilled engineers further complicates the situation, not only extending design timelines and inflating costs due to the premium on expert talent, but also putting companies at risk of falling behind in the fiercely competitive race to secure fab capacity.

Using automation to maximise resources

However, the landscape is evolving, and there is now a range of tools and software solutions on the market designed to tackle these challenges. A key feature to look out for when considering these tools is the use of automation to reduce manual intervention, streamline the migration of designs to new nodes, and optimize designs to save time and cost thus providing a clear advantage over manual processes.

In response to these challenges, Thalia’s AMALIA platform emerges as a prime example, leveraging AI and ML in its suite of tools for advanced analog design, particularly within the PMIC/RFIC domain.

IP reuse diagram
Engagement time saved using AMALIA platform versus manual migration approach.

How AMALIA addresses the gaps in the traditional IP migration flow

The first tool in the platform is AMALIA‘s Technology Analyzer (TA) which automates the initial and time-consuming process of analyzing electrically comparable devices between the source and target Process Design Kits (PDKs) to significantly shorten the time needed for technology assessment and decision-making that would precede any IP migration.

Next, the AMALIA Circuit Porting (CP) tool builds on this analysis, automating the migration of schematics and testbenches with a high level of accuracy and reliability. This step not only maintains the integrity of the original design but also drastically reduces the time required in manual porting.

If circuit porting alone does not meet all the design constraints, AMALIA Design Enabler (DE) uses AI and machine learning to optimize circuit performance, focusing on critical devices and making targeted adjustments. This results in a design that meets, and often surpasses, the required specifications, significantly reducing iterations and the overall development duration.

Lastly, AMALIA‘s Layout Automation (LA) tool ensures that the intelligence gathered during silicon validation is not lost in translation to the final layout. By automating routine tasks and conducting thorough design rule checks, LA maintains the original placement and floorplan, thus upholding the design’s integrity and facilitating a smoother transition to manufacture-ready designs.

A strategic advantage

The semiconductor industry’s shifting towards automated IP design migration is a response to the increasing complexity and pace of technology development. Thalia’s AMALIA platform delivers a comprehensive solution that bridges the gaps in manual design migration flow and offers a unique combination of speed, efficiency, and precision that significantly reduces design cycle time by up to 40%. In turn, associated costs are reduced and time-to-market for new products is faster, offering a strategic advantage to companies looking to stay competitive in a dynamic market.

To integrate an advanced solution like AMALIA into your design workflow and discuss how Thalia can support your needs, please contact us here.

IPSoC 20 Conference: Increasing confidence in analog and mixed signal design reuse

by Sowmyan RajagopalanBlogNews & Events

At the December virtual IPSoC conference, our CTO, Sowmyan Rajagopalan, presented his paper on increasing confidence in analog IP reuse. His presentation is available in the video below. If you would like to understand what Thalia’s targeted automation and migration expertise means for your next project, get in touch to find out more.

Technology Analyzer transforms analog IP reuse

by Rodger SykesPress Release

A significant upgrade to Thalia’s AMALIA IP reuse platform cuts the cost of qualifying IP in a target technology. Thalia Design Automation, experts in targeted automation for analog and mixed signal design and IP reuse, today announced the launch of its Technology Analyzer, a further enhancement of its AMALIA IP reuse platform.

Much of the effort involved in migrating an IP from one technology to another is associated with qualifying the IP in the target technology. If a block fails to meet the requirements in the target technology, its response would be sub-optimal or would make the block unusable.

With traditional methods, identifying such issues can be extremely time consuming.  Thalia’s Technology Analyzer is the latest enhancement of its AMALIA IP reuse plus platform. It rapidly and accurately identifies the root cause of discrepancies between base and target technologies, allowing a solution to be implemented much more rapidly than in conventional analog IP design.

“This latest evolution of our AMALIA platform is a game changer,” said Sowmyan Rajagopalan, Thalia Design Automation CTO. “Whenever a key specification is not being met in the target technology, we have to determine the process technology or circuit characteristic responsible. By using our automated Technology Analyzer, we can take a design-centric approach to rapidly analyze and compare base and target technologies to see where the process technologies are similar and where they differ the most.”

The AMALIA Technology Analyzer addresses a comprehensive array of first and second order effects including FT, gm/id, Vdsat, Vt mismatches and others.

AMALIA’s Technology Analyzer helps clients assess whether or not IP is fit for purpose or suitable for cost-effective migration – a technology assessment solution essential in the selection of external IP and target process.

Read our new white paper to understand more about Thalia’s Technology Analyzer.

Thalia and Dolphin Design announce partnership

by Sowmyan RajagopalanPress Release

Transforming analog IP re-use economics and accelerating time to market

Advanced IP re-use plus technologies employ advanced AI algorithms and targeted automation with smart design methodology to improve outcomes and to reduce the resource costs of analog IP portfolio development

Cwmbran, UK, Grenoble, France 4th September 2020. Thalia Design Automation, experts in targeted automation for analog and mixed signal design and IP reuse, and Dolphin Design, a leading company in semiconductor IPs and  platform solutions, today announced a partnership transforming the way IP portfolios are expanded and managed, delivering new IPs to market faster and more cost-effectively than through conventional processes.

The partnership has already seen Thalia’s targeted automation platform, AMALIA, deployed alongside its experienced analog design and migration experts, to deliver power management and audio IPs supporting respectively Dolphin Design’s SPIDER and BAT platforms during the last 12 months. Thalia’s unique trifecta of design expertise, its proprietary technology analyzer and targeted automation enable project delivery up to twice as fast as a conventional design process.

The initial phase of the partnership has delivered 12 power management and audio IPs in various process nodes and flavours that enabled Dolphin Design to improve market penetration by expanding its portfolio of analog IPs using Thalia’s technology and expertise.

Philippe Berger, Dolphin Design CEO, said: “Conscious of the explosive growth in IoT, mobile and automotive, we decided to focus our in-house design teams one hundred percent on delivering innovative new IP designs for customers. Thalia’s AMALIA platform and its experts frees up our engineering resources to design future IP generations and helps us grow into new markets through a wider panel of technological nodes, as well as to consolidate our position. The partnership with Thalia allows us to expand our IP portfolio and to achieve a faster Time-to-Market, while improving our innovation capabilities.”

Sowmyan Rajagopalan, Thalia Design Automation CTO, said: “To date, our partnership with Dolphin has been hugely productive and we are excited to move on to the next phase.  Our AMALIA platform takes IP re-use to the next level – what we are calling IP re-use plus – allowing clients like Dolphin Design to benefit from cost-effective technology analysis, coupled with design and targeted automation tools that enable us to deliver specified features and performance with precision and against challenging time-to-market and cost requirements.”

About Dolphin Design 

Headquartered in France, Dolphin Design, previously known as Dolphin Integration, is a semiconductor company employing 160 people, including 140 highly qualified engineers.

They provide differentiating platform solutions built on state-of-the-art IPs and architectures, customized by unique system level utilities to deliver fast and secure ASICs, either designed by or for their clients. These platforms are available for various technological processes and optimized for Energy Efficient SoC Design.

Alongside their clients, now exceeding 500 companies, they focus on human, inventive and long-term collaboration to enable them to bring products, powered by innovative and accessible integrated circuits that minimize environmental impact, to the hands of billions of people every day. In consumer markets including IoT, AI and 5G, and in high reliability markets, they unleash SoC designer creativity to deliver differentiation.

Tell them your biggest dream. Dare the impossible. They tech it on.

Press contact: aurelie.descombes@dolphin.fr

SemIsrael: Thalia CTO Sowmyan Rajagopalan discusses the challenges of analog IP reuse  

by Sowmyan RajagopalanBlogNews & Events

Looking back on June’s SemIsrael virtual event and reflecting on the topics discussed, it’s clear that the developments taking place in the fields of LIDAR and 5G are having a significant impact on the semiconductor industry.

The need for high speed sensors and data conversion to enable autonomous cars will place an increasing demand on the sector to deliver components quickly and evolve them as technology advances. While full autonomy is some way off, the evolutionary process of connected vehicles will mean that the needs will change as technology becomes more advanced and vehicle systems demand more from sensors and mobile data connectivity.

Machine learning was also prevalent in the agenda and discussions. The benefit of machine learning in migration from one process to another is clear and given the time that can be saved in getting new IPs to market, it’s no surprise that the industry is heading in this direction.

Verification, design, IoT devices and Thalia’s own targeted automation technologies are all areas where we are seeing machine learning play an ever-more important role. High performance circuits, including technologies such as 12FF and 7FF, are increasingly demanding the efficiency and accuracy that machine learning can deliver at pace.

Our CTO, Sowmyan Rajagopalan, presented his paper on addressing technology differences in IP reuse. His presentation is available in the video below. If you would like to understand what Thalia’s targeted automation and migration expertise means for your next project, get in touch to find out more.

Presenting in a virtual world

by Sowmyan RajagopalanBlogNewsNews & Events

A few weeks ago, our founder and CTO, Sowmyan Rajagopalan, was due to give a presentation at the DATE Grenoble Conference. For obvious reasons, that conference didn’t proceed as planned, with speakers instead giving virtual presentations to the audience remotely.

Sowmyan gave the following presentation, talking about why analog IP reuse is a big problem for semiconductor companies, as well as providing an introduction of who Thalia is and how we can help.

His presentation addresses the decision fork that companies face: designing new IPs or building a portfolio of analog IPs.

Thankfully, this isn’t necessarily an either or situation though. We can help.

Watch his presentation to hear more.